Overlapping is not merging

The picture at the top is a row of five standard cells, the small repeated building blocks of a chip, with a power rail running along the top and another along the bottom. Each rail looks like one long bar of metal. It is not. Every cell brought its own piece of rail, and neighboring pieces overlap by 1.2 µm at each joint. The thin dark lines inside the teal are the outlines the file actually stores. The solid fill hides them, which is why overlap is easy to draw, easy to forget, and easy to ship.

This note is about the one operation that turns those pieces into a single shape, what it does and does not do, and four layouts where the difference decides whether the part works.

What a merge is

A merge takes every shape on one layer and computes the area they cover together. That is a boolean OR, also called a union. It then stores that area as the fewest closed outlines that bound it. Four things follow from that sentence, and each one catches people.

The result is defined by area, not by the inputs. Where two shapes overlap, the covered area is counted once. Five rail segments, each 9.2 µm long and 1.6 µm tall, add up to 73.6 µm² if you total the rectangles. The union is 41.2 µm long, so 65.92 µm². The 7.68 µm² difference is the four joints, 1.2 µm by 1.6 µm each, that were counted twice. Merging does not change the metal. It changes how many times the file claims to own it.

The result has one outline per connected region. Shapes belong to the same region when they share area, or when they share an edge of positive length. Interior edges, the ones that ran through the overlap, are removed. A region that encloses empty space keeps that space as a hole, which is its own subject in holes in polygons. Two shapes that touch only at a single corner point are the one case where tools disagree, so do not draw them and do not depend on them.

A merge works inside one layer and one data type. Shapes on a different layer, or on the same layer number with a different datatype, are not inputs. They are neither merged nor changed. Metal does not merge into metal2, and a via is not absorbed by the wire it lands on.

A merge cannot be undone from the file. After the operation there is a polygon with more corners and no record that it began as rectangles. If you need to know where the cell boundaries were, or which piece came from which instance, merge a copy.

Overlap, by contrast, is only a coincidence of coordinates. The file holds the shapes it was given, and any tool that does not merge first is free to treat them as separate objects. That is what the rest of the note walks through.

Example 1: a power rail stitched from cells

In the lead picture each cell draws its piece of rail a little longer than the cell, so that neighbors are guaranteed to meet. Each piece is 9.2 µm long in an 8 µm cell. The metal stubs that reach down to the transistors are separate rectangles too, and each pokes into the rail by 0.4 µm. Count what the file stores for the top rail: five rail rectangles and five stubs, ten shapes and 40 corners.

After the merge each rail is one comb-shaped polygon with 24 corners. The seams at the joints are gone, and so are the lines where each stub entered the rail. The covered area is exactly what it was before. The transistors (the purple active areas and gold gate fingers) are untouched, because they sit on other layers.

Two practical consequences. A width check now measures the 1.6 µm rail along its whole length, not nine separate rectangles that each pass on their own. And a tool that extracts connections from outlines now sees one conductor along the whole row, where before it saw whatever its own rules about overlap told it to see.

There is a catch you will meet in a real design. Those rail pieces normally live inside the cell masters, and the parent cell holds five references to them. A merge run in the parent cell sees five placements and no metal at all. To merge across them you must flatten first, or use a tool that merges across the hierarchy for output. This is also why a merged version is often a copy made for checking and mask preparation, not the file you keep editing.

Example 2: three kinds of joint, and one that does not join

Segments meet in only a few ways, and they merge differently.

The upper rail in the picture is four rectangles, 3.2 µm tall. A runs from 0 to 12 µm. B runs from 11 to 24 µm, so it overlaps A by 1 µm. C runs from 24 to 36 µm and abuts B exactly. D starts at 36.4 µm, leaving 0.4 µm of empty space after C.

• Overlap (A and B). Shared area. They merge, always.
• Abutment (B and C). Shared edge, no shared area. The merge joins them, because an edge of positive length counts as connected. Before the merge, whether a connection checker treats B and C as touching depends on the tool. After the merge there is no question: one outline.
• Gap (C and D). There is nothing to join. A union cannot invent metal, so D stays its own polygon. The lower rail shows the result: one polygon from 0 to 36 µm and one from 36.4 to 48 µm, and the white line between them is still there.

Merge a rail and ask how many polygons came back. Four segments should have become one if you meant one conductor. Two means a gap, and the gap is where to look. It can be a 0.4 µm sliver like this one, which a factory may or may not print depending on its minimum spacing. It can also be a single database unit, the smallest step the file can store, which you cannot see at any zoom. Snapping and off-grid points is where such gaps usually come from.

Example 3: overlap across layers is normal

A chip is a stack of separate layers, and every layer is drawn on top of the others. Overlap between layers is the normal state of a layout, not a problem.

Here three horizontal metal1 wires (a power rail on top, a signal wire in the middle, a ground rail at the bottom) are crossed by two vertical metal2 straps. There are six crossings. Only two of them have a copper-colored via, the small square that joins the two layers: the left strap lands on the power rail and the right strap lands on the ground rail. At the other four crossings, the two layers pass over each other with no connection. The left strap crosses the signal wire and the ground rail. The right strap crosses the power rail and the signal wire.

On screen, all six crossings look alike. In the mask they are different, because the via is an explicit shape on its own layer, and its absence is what keeps a strap off a wire. A merge on metal1 leaves metal2 alone, and the three wires, which do not touch each other, come back as three polygons. If an operation merged every layer into one, power, ground and signal would become one blob, which is why every merge names a layer. The details of the connection itself are in vias and contacts, and layer numbers are in layer and datatype.

Example 4: when merging makes a short official

The last layout is a circuit board, not a chip. A ground pour is a wide region of copper that fills the empty area of the board. It has a window around a pad so that the pour stays away from a signal. Drawn at board scale in this figure, the pour is 4 mm by 3.5 mm, the window is 1.5 mm square, the pad is 0.5 mm, and the trace is 0.15 mm wide.

On the left, the pad sits in its window, but the trace leaves the window and runs across the copper and out past it. For 1.25 mm the trace and the pour share area on the same layer. Both outlines are in the file, and nothing on screen looks wrong. After etching, the overlap is one piece of foil, and the signal is shorted to ground. A merge would make that statement official by replacing the trace and the pour with one polygon, from which no one can recover which part was the signal.

On the right, the pour has a slot cut for the trace, 0.6 mm wide, which leaves 0.225 mm of clearance on each side. The trace never touches the pour. A merge here returns the pour as one polygon with a slot and the trace as another polygon, which is exactly right.

Board design software usually prevents this because it knows nets, the names that say which copper belongs to the same wire. It carves clearance by itself. The drawing above matters when the data has no net names: copper imported from a Gerber file or a drawing exchange file is only shapes, and the only evidence of intent is geometry.

Before you merge

A merge is easy to run and hard to review, so check it before you keep it.

1. Choose one layer. Say which layer and datatype the merge covers, and what you expect on the others.
2. Count shapes and corners before and after. Five rail rectangles that become two polygons mean a gap. Corners that rise instead of falling mean the engine split something it should not have.
3. Compare area. The merged area equals the union and is never more than the total of the inputs. If it equals the total exactly, nothing overlapped.
4. Compare against the original with an XOR. Take the merged result and the original shapes and compute the XOR, the parts covered by one but not both, as described in boolean operations. The answer should be empty. Anything left is geometry the merge added or removed.
5. Keep the inputs until you have checked. Put the result on a scratch layer, run the checks, and replace the originals afterwards. Merging polygons shows what a merge writes into the file and where it goes wrong.

Measurements depend on this too. Density is computed from covered area, and a checker that adds up overlapping shapes will report more metal than there is. The rule is not whether shapes overlap. It is whether the file says one thing or two, and whether that is what you meant.