Shapes
Manhattan versus all-angle
Manhattan layouts use only horizontal and vertical edges; 45-degree and all-angle layouts allow slants and curves. The choice changes wire length, how gaps are measured, which corners land on the grid, which rules apply, and what the mask costs.
Last edited: October 9, 2026

Every edge in a layout points somewhere. If every edge points either left and right or up and down, the drawing is Manhattan, named after the street grid of the island where most avenues and streets meet at right angles. If edges may also run at 45 degrees, the drawing is octilinear, often just called "45-degree." If edges may point in any direction at all, the drawing is all-angle. The choice sounds like a matter of taste. It is not. It decides how a wire's length adds up, how a gap is measured, which coordinates land on the manufacturing grid, how long a mask takes to write, and which rules a checker applies.
The picture at the top of this page is one hairpin turn drawn three ways in LayoutEditor. The navy band inside is Manhattan: it climbs over the bend in steps of 1 µm, and its outline needs 32 vertices. The red band in the middle uses 45-degree corners and needs 16 vertices. The ochre band outside follows the intended curve in 1-degree steps and needs 366 vertices. The thin dark lines over the two inner bands mark the smooth arc each one stands in for. All three bands are the same 3 µm wide and make the same turn. They do not cost the same to check, to store, or to make.
Three angle budgets
A Manhattan polygon is a rectangle or a union of rectangles: every corner is a right angle, either pointing out or notched in. A 45-degree polygon adds chamfers and diagonal runs. An all-angle polygon may contain anything, including a circle. Layout formats have no true arc inside a polygon, so a circle or a bend is stored as many short straight edges, as circles and curves explains. That is why the smooth band in the lead has more than ten times the vertices of the 45-degree band.
File formats treat the three budgets differently. GDSII stores every corner as a pair of integer coordinates and accepts any angle without comment. OASIS distinguishes them on purpose: it has compact point-list forms for Manhattan outlines, a form for octangular outlines with 45-degree edges, and general forms for all-angle outlines. The more regular the geometry, the fewer bytes per corner.
Length: what the staircase costs

The second picture connects the same two pads four times. The pads sit 20 µm apart horizontally and 10 µm apart vertically, and each wire is 1 µm wide. Measured along the centerline, the L-shaped route at top left is 30.00 µm long. The five-step staircase at top right is also 30.00 µm. The route with one 45-degree leg at bottom left is 24.14 µm, and the straight diagonal at bottom right is 22.36 µm.
The two numbers at the top are not a coincidence. A Manhattan route between two points always pays the full horizontal distance plus the full vertical distance, however many steps it takes. Splitting the climb into smaller stairs makes it look more like a diagonal but never makes it shorter. Only a slanted edge cuts the corner. The 45-degree route saves about 20 percent here, and when the horizontal and vertical distances are equal it saves about 29 percent, because a diagonal across a square is √2 times one side rather than two sides.
Extra length is extra resistance and capacitance, and on a long signal it is extra delay. That is the argument for slanted wires. The rest of this article is the argument against them.
Measuring a gap on a slant

A spacing rule is a minimum distance between two shapes, measured as the shortest straight line between their edges. In SkyWater SKY130, an open process for 130 nm chips, the first metal layer, met1, must keep at least 0.14 µm of space. In the third picture both pairs of met1 wires leave the same 0.18 µm gap when you read straight across, the dark horizontal ticks. For the vertical pair that reading is the true distance, and LayoutEditor's spacing check at 0.14 µm passes it.
For the 45-degree pair the horizontal reading is not the distance. The shortest line runs square to the slanted edges, the gold segments, and it is shorter by a factor of √2: 0.18 µm divided by 1.414 is 0.127 µm. LayoutEditor's spacing check reports exactly 0.127 µm on that pair and flags it as a violation. Nothing about the drawing looks closer. The same thing happens to width: a 45-degree wire that is 0.425 µm across when measured horizontally is only 0.30 µm thick. Anyone who checks a slanted shape by reading x or y coordinates is using the wrong ruler, which is why width and space rules are always defined as perpendicular, edge-to-edge distances.
Rules that limit angles, layer by layer
Because slanted edges complicate everything downstream, foundries say which angles each layer may use. The SKY130 rule deck is a clear example. On poly, the local interconnect layer li1, contacts, and every via layer, only multiples of 90 degrees are allowed (rule x.2). Diffusion and tap shapes inside an area marked as analog must even be plain rectangles. On the metal layers and most others, multiples of 45 degrees are allowed (rule x.3a). Any other angle is an error, and the checker reports it with messages that begin "non-manhattan" or "non-octagonal."

The fourth picture runs those rules in LayoutEditor's angle check. The top wire is li1 with a 45-degree jog: the 90-degree check flags both slanted edges, in gold. The middle wire is the same jog on met1, where 45 degrees is legal: the 45-degree check reports nothing. The bottom wire is met1 with a 30-degree jog: the 45-degree check flags both of its slanted edges. The jog is equally gentle in all three. Whether it is legal depends on the layer and the angle, not on how it looks.
Off-grid corners
Every coordinate in a chip layout must land on a manufacturing grid, 5 nm in SKY130, as snapping and off-grid explains. A slanted edge whose two ends sit on grid points is fine. The trouble starts when a program has to compute new corners, and the most common case is a path, a centerline with a width, that bends by 45 degrees.

The fifth picture zooms into such a bend, 0.34 µm across, with LayoutEditor's grid shown as dots every 5 nm. The path is 0.14 µm wide, the met1 minimum, and its centerline bends exactly on a grid point. When LayoutEditor converts the path into a polygon, the outer and inner corners sit 28 nm to either side of the bend, because the half-width of 70 nm times tan 22.5 degrees is not a whole number of grid steps. The gold diamonds mark those two corners, between the dots. Five of the polygon's nine corners are off the 5 nm grid, and LayoutEditor's grid check flags the shape. A 0.5 µm path has the same problem, with corners 104 nm from the bend. When 45-degree geometry must be exact, draw it as a polygon whose corners you place on the grid yourself, and check the grid before you export.
What the mask writer pays
A photomask for a chip is usually written by an electron beam. The common variable-shaped-beam writers expose one rectangle at a time, and many of them can also expose right triangles with a 45-degree side. Before writing, mask preparation software performs fracture: it cuts every shape into those pieces. A Manhattan layout fractures into rectangles cleanly. A 45-degree edge adds triangles or trapezoids. An all-angle edge or a curve can only be approximated, by many small shots along the edge, and every extra shot adds writing time. For logic layouts that are mostly Manhattan this barely matters. For layouts full of curves, such as photonic circuits, it can dominate the cost of the mask. Newer writers with many parallel beams expose a pixel image instead of shapes, which makes curves much cheaper, but the economics of the shape-at-a-time machine shaped the habits of the whole industry; the e-beam article goes further.
The diagonal experiment
The chip industry has tried to leave Manhattan wiring behind at least once. In 2001 Toshiba and the router company Simplex, later joined by Cadence and some forty other companies in the X Initiative, proposed the "X Architecture": keep metal layers one to three Manhattan, so existing cells still fit, and turn the main direction of metal four and five by 45 degrees. They reported more than 20 percent less total wire and more than 30 percent fewer vias on typical designs, and Toshiba announced a commercial chip built that way in 2004. Critics answered that a diagonal wire blocks the routes around it, so the saving in length is partly paid back in density. Diagonal routing did not become the industry default. Most digital chips today route Manhattan, and at advanced nodes the lowest metal layers are often restricted further, to a single direction per layer.
Different fields, different habits
Digital chips are Manhattan almost everywhere: standard cells, routing, vias. 45-degree shapes appear where the deck allows them and the job is worth it, such as wide power straps on upper metal, pad openings, and the seal ring around the die.
Analog chips lean even harder on rectangles, because devices that must match are easiest to match when they are simple, identical shapes; analog layout is furniture describes that discipline.
Circuit boards are the opposite default. Board routing is habitually 45-degree, and many board tools also route at any angle or in arcs. Board designers avoid acute angles between copper edges, which were long blamed for trapping etchant.
Photonic circuits need all-angle geometry. Light leaks out of a waveguide at a sharp corner, so bends must be smooth arcs, and a staircase approximation would scatter light at every step. Photonic layouts therefore use fine grids and many vertices, as waveguides are paths with feelings explains.
MEMS mixes both: comb drives and folded springs are mostly rectangles, while membranes, proof masses, and some springs are round or curved.
In LayoutEditor
LayoutEditor lets you choose the angle budget before you draw. Under Setup, the Shapes section has an angle limitation for new shapes: all angle, fine angles in 5-degree steps, 45 degrees, or 90 degrees. With 90 degrees selected, every new path or polygon you click is Manhattan. The limitation applies to drawing new shapes; moving a single corner of an existing shape can still create a slanted edge, so it is not a substitute for checking.
The design-rule checker covers the rest. Its angle check finds edges that break a 90-degree or a 45-degree budget, or angles sharper than a limit, optionally after merging touching shapes first. Its spacing check measures true edge-to-edge distance, so it reports the 0.127 µm in the third picture rather than the 0.18 µm on the screen. Its grid check finds the off-grid corners in the fifth picture. All of them are also available to scripts.
Choosing
Start from the layer and the process, not from the picture. If the layer is Manhattan-only, set the 90-degree limitation and draw steps. If 45 degrees is allowed and the extra length matters, a 45-degree leg is the standard compromise: about 20 to 29 percent shorter on a diagonal trip, cheap to fracture, and understood by every rule deck that allows it. Then measure any slanted gap or width square to the edge, place 45-degree corners on the grid, and run the angle, spacing, and grid checks before export. Reserve all-angle shapes for the jobs that truly need them, such as a waveguide bend, a round pad, or a membrane, and expect more vertices, more checking, and a longer mask write when you use them.
Continue exploring
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Drawing circles in a layout: polygons, side count, and arc error
A layout file saves a circle as a many-sided polygon. How many sides to use, how far the flats sit inside the true radius, and what the mask shop will see.
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Width and space
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Snapping, and the quiet disaster of off-grid points
The magnet on your cursor is how drawings stay manufacturable. Turn it off and you will invent illegal corners.
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Waveguide layout: bend radius, width, and paths on a photonic chip
A waveguide is a path that light follows. Width sets the mode, a tight bend radiates, and the bend radius is part of the device, not a routing convenience.
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E-beam direct write vs. mask writing: Gaussian, VSB, and multi-beam
E-beam lithography writes a layout into resist without a mask, either on the wafer (direct write) or on a photomask blank; Gaussian, VSB, and multi-beam writers differ in shot count, write time, and resolution.
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Paths in layout: centerline, width, end caps, and bends
A layout path stores a centerline and one width. How end caps and corners are built, when a path turns into a polygon, and how a wrong cap causes an open or a short.
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Design rules and DRC: real rule values and how to read a marker
Design rules are the factory's limits in numbers; DRC is the spellchecker that measures them. SKY130 width, space, and enclosure values, rule flags, how to write and test a .ledrc rule deck by hand, and why deleting a marker fixes nothing.
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Analog layout is furniture: matching, dummies, and guard rings
Identical schematic devices come out different on silicon. Pelgrom's area law, stress and well-edge effects, common centroid, dummy fingers, and guard-ring rules from an open PDK.