Fill

Fill (also dummy fill, or tiling) is extra shapes added so a sheet's coverage stays inside the factory's window, not because the circuit asked for them.

The squares sit beside the strap, not on it. They are there for coverage.

Density rules fail both on empty corners and on solid plates. Fill scatters grounded or floating squares across the open regions, and it may cut holes in a plane that is too solid. A 100 micrometer tile that was 8 percent metal 2 might need 200 dummy squares of 1 micrometer. Foundries publish the fill sizes, the spacing those squares must keep from real nets, and whether the dummy metal must be grounded. A 1.0 by 1.0 micrometer square on a 2.0 micrometer pitch is a common recipe. On screen the result is a field of identical tiny rectangles that do not appear in the schematic. Turn the fill off and the circuit remains. Leave the fill off and the wafer process may not succeed.

The squares have to respect a keepout over sensitive analog, over inductors, and over optical waveguides. Analog keep-outs then read as empty lakes in a sea of tiles. Fill must not short a net, and it must not land inside a pin. After fill, run DRC again. Run density again after a late ECO, because a deleted bus leaves a hole that fill has to retile.

The pattern is not decoration that can be deleted for a screenshot. The foundry wanted that coverage. Delete it on the tapeout copy and the density check fails.

More is in density rules and fill and design rules and DRC.