Poly

Poly (polysilicon, the gate) is the gate film drawn as a strip that crosses a silicon island and turns that crossing into a switch.

The strip crosses the island and continues to a plug on the tab. That strip is the gate.

The gate length is the poly width over active. A 0.18 micrometer drawn gate is a process generation in one number. Poly also makes resistors and old local interconnect. Minimum width and spacing are tight. A contact to poly needs enclosure. On screen the strip is a bar crossing an active rectangle, with contacts on the gate tab if the PCell brought one out. In digital cells, poly is a row of vertical gates on a pitch.

Poly is a layer, not a net name. After the first metal, routing climbs with vias. Some processes add metal gates. People still say “poly” for the gate layer out of habit. Using the strip as a long wire because it was handy spends a resistive film on a job metal should carry, unless the PDK gave a poly resistor on purpose.

Older processes route short hops on poly to save a via, when the PDK models the resistance. A 20 micrometer poly run can be hundreds of ohms. Silicide on poly lowers that number, and a poly resistor PCell wants the resistance. Do not mix those jobs on one strip. Gate poly also has a spacing to contact that is easy to violate when the strip is stretched by hand. Which sheet that strip is allowed to be is what a layer is for. Why the drawn strip and the film in the furnace are not the same name is process layers vs drawing layers. How fat the strip must be, and how far from the next one, is width and space.