What is a layout, really? Shapes, layers, units, and cells

A layout is the drawing a factory builds from. It is not a photograph of a chip and not a schematic of named parts. It is a stack of sheets that share one coordinate system, where each sheet is a layer and each shape on it tells a later machine where to print, etch, implant, or plate. The same idea drives chips, printed circuit boards, MEMS, and photonics; only the units, layers, and file formats change.

The picture at the top of this page is a crop of a real standard-cell block at a 0.5 µm scale bar. Horizontal bands of diffusion and local interconnect run across it, dark vertical straps tie the rows together, and black squares mark the contacts where one film reaches another. It looks like an abstract painting. To a fab it is a precise list of instructions.

What the file actually stores

None of the colors are in the file. A layout file stores integers: which layer each shape is on, and the coordinates of its corners.

• Shapes. Each filled region is a polygon or a box. A path is a centerline with a width that the tool turns into a region.
• Layers. In GDSII, each shape carries a layer number and a datatype. In the open SKY130 process, metal 1 drawing is 68/20 and polysilicon is 66/20. The colors come from a separate layer-properties file on your machine, so a colleague with a different color map receives exactly the same corners.
• Units. Coordinates are whole numbers of a database unit. 1 nm (0.001 µm) is a common choice for chips and the default in KLayout. GDSII stores coordinates as 4-byte signed integers, so at 1 nm per unit a single coordinate can reach about ±2.1 m, far beyond any die. A gate corner is not "about here"; it is a pair like (1250, 4800) on layer 66.
• Cells. Shapes are grouped into named cells, and cells place other cells as instances.

GDSII, the stream format Calma introduced in the late 1970s, is still the most common handoff to a mask shop. OASIS (SEMI P39) stores the same kind of data more compactly and is used for very large designs. See GDSII in plain language and OASIS when GDS gets huge.

A layout is a library, not a poster

A single file can hold one contact, one transistor, a standard-cell library, and a whole chip at the same time. What goes to the factory is the top cell you name. Everything that top cell places, directly or through other cells, goes out with it. Name the wrong cell and you ship a contact instead of a chip.

Hierarchy is why layouts are editable at all. A SKY130 high-density standard cell is 2.72 µm tall, and a digital block places the same inverter cell thousands of times. Widen a gate in the master cell and every placement widens with it. A drawing made of hand-copied shapes would drift the first time someone fixed only one copy. More in cells and instances.

Where two films meet

The second picture zooms into one connection. The wide teal pad is the lower metal. The smaller navy pad is the upper metal. The copper square is the via, the cut that lets the two films touch. The cut must sit inside both metals with a margin on every side, because layers do not print in perfect alignment with each other. Design rules state that margin as an enclosure. In SKY130, for example, a via between metal 1 and metal 2 is exactly 0.150 µm square, and metal 1 must enclose it by at least 0.055 µm on every side (rule via.4a) and by 0.085 µm on one of two adjacent sides (via.5a). A via that only touches a corner of the lower metal looks connected on screen and becomes an open when the films shift by a fraction of a micrometer.

A screenshot is not a layout

Hide the metal sheets in an editor and a device shrinks to its active area and gate fingers. The metal is still in the file; the view simply leaves it out. That is the difference between a picture and a layout. A screenshot freezes one view: some layers on, some off, at one zoom, with one color map. It contains no layer numbers, no database units, and no cell hierarchy. A mask shop cannot build from it, and a colleague who redraws from it invents a new set of coordinates.

Reviews go wrong the same way. Someone looks at a calm view with the contact layer hidden, sees metal crossing a device, and signs off on a connection. The contacts were never drawn. The eye added a via that the file did not contain. Design-rule and layout-versus-schematic checks read the integers in the file, not the paint, which is why they catch what the reviewer missed. See LVS: layout versus schematic.

Labels have the same trap. Text in a slide looks like a pin name but is just pixels. A pin name that tools must read is a text object in the layout on a label layer (68/5 for metal 1 in SKY130), placed over the shape it names.

From layout to masks

A layout becomes masks, or a direct-write recipe, only after the process maps your layers onto manufacturing steps. Many drawn layers map to one photomask each; others are combined or generated by recipe. The SKY130 layer reference lists more than 30 mask levels across its process options, from field oxide and wells through five metals and the pad opening. The editor knows nothing about that mapping until a technology file defines it. A strap drawn on the wrong layer is a working picture and a dead chip. Construction lines left on a manufacturing layer become metal, because the mask writer cannot tell a note from a wire.

Before you send the file

1. Name the top cell and write it in the note that goes with the file.
2. State the database unit (for example 0.001 µm) and the layer map you used.
3. Turn every layer on, including the ones that look empty, and confirm contact and via layers contain what you think they contain.
4. Read one corner back as numbers: layer, datatype, x, y. If the circuit you remember depended on a color, a hidden sheet, or a zoom level, you were reviewing a picture.
5. Run DRC and LVS on the file you will actually send.
6. Send the stream file, never the screenshot.

The colors are a convenience. The corners, layers, and cells are the contract.