Clearance

Clearance is a required empty distance, named as a rule: how far this must stay from that.

The copper pair is held apart by a wide gap. The upright bar is a different neighbor, with its own gap.

Boards and packages use the word more often than chip decks, which usually call the same idea spacing in the DRC deck. Copper to copper, copper to board edge, pad to courtyard, high-voltage net to low-voltage net — each pair has a number. A 0.2 millimeter copper-to-copper clearance and a 0.4 millimeter high-voltage clearance can live on the same board. A board stack may state clearance 0.15 mm and mark the spot where two traces sneak closer. Clearance is a number. A keepout is a drawn region. A courtyard is claimed part space. Width is fatness, not a gap.

One global clearance is the wrong table for every net. A mains connector and a 3.3 volt I2C pair do not share a number, because voltage and shop class change the table. IPC classes and shop charts publish clearance tables. A 0.15 millimeter gap that is legal for an inner signal pair can be illegal for an outer-layer pair next to a mounting hole. When clearance in copper is not enough, a high-voltage slot is milled through the board. On chips, read spacing in the PDK instead of inventing a clearance number from a board book.

How gaps are measured, why the numbers bind, and where they sit in a board stack are covered in width and space, design rules and DRC, and a PCB stackup.